LECS
Laboratoire pour les systèmes informatiques émergents
Université Concordia · Montréal
Journal

A Reconfigurable Nanophotonic Architecture based on Phase Change Material

IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip · 2021 · DOI: 10.1109/VLSI-SoC53125.2021.9606967
Interconnexions photoniques sur siliciumArchitectures reconfigurablesSystèmes-sur-puce multicœurs
IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip 2021 Parya Zolfaghari, S. L. Beux
Résumé

Silicon photonics is an emerging technology allowing to take the advantage of high-speed light propagation to accelerate computing kernels in integrated systems. Micrometer-scale optical devices call for reconfigurable architectures to maximize resources utilization. Typical reconfigurable optical computing architectures involve micro-ring resonators for electro-optic modulation. However, such devices require voltage and thermal tuning to compensate for fabrication process variability and thermal sensitivity. This power-hungry calibration leads to significant static power overhead, thus limiting the scalability of optical architectures. In this paper, we propose to use non-volatile Phase Change Materials (PCM) elements to route optical signals only through the required resonators, hence saving calibration energy of bypassed resonators. The non-volatility of PCM elements allows maintaining the optical path. We investigate the efficiency of the PCM elements on the Reconfigurable Directed Logic (RDL) architecture. Results show that the static power is reduced by 32.8% on average and that 30% power saving is obtained from 158kHz reconfiguration frequency.

Citation

Si vous citez ces travaux, merci d'utiliser l'entrée ci-dessous. Vous pouvez copier le BibTeX dans le presse-papier via le bouton en haut de page.

@article{parya202113e32086bceba5ea70be07b6327ab686313251e0,
  title  = {A Reconfigurable Nanophotonic Architecture based on Phase Change Material},
  author = {Parya Zolfaghari and S. L. Beux},
  journal = {IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip},
  year   = {2021},
  doi    = {10.1109/VLSI-SoC53125.2021.9606967}
}

Remerciements

Ces travaux ont été soutenus en partie par le Conseil de recherches en sciences naturelles et en génie du Canada (CRSNG) et par le Fonds de recherche du Québec — Nature et technologies (FRQNT).