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Design of a Reconfigurable Receiver for Nanophotonic Interconnects

Shayan Zohrei, S. L. Beux

IEEE International New Circuits and Systems Conference · 2022 · DOI: 10.1109/NEWCAS52662.2022.9842058

Silicon photonic interconnectsReconfigurable architectures

IEEE International New Circuits and Systems Conference 2022 Shayan Zohrei, S. L. Beux

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Abstract

As silicon photonics is becoming a mature technology, it is now possible to envision nanophotonic interconnects replacing electrical interconnects. This transition can improve the chip-scale communication bandwidth, latency, and energy efficiency. This paper presents a digitally controlled reconfigurable receiver that can adapt its gain based on the input optical power. The receiver power consumption can thus be reduced to the minimum required to reach the targeted BER (Bit Error Rate). For this purpose, we propose a design method to configure the receivers according to both system-level and technological level parameters. Compared to the conventional receiver, the proposed receiver reduces power consumption by 9% on average and up to 25% for short-range communications.

Citation

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@article{shayan202286edbedbf5d0a07178d2f022a08d212ff299855b,
  title  = {Design of a Reconfigurable Receiver for Nanophotonic Interconnects},
  author = {Shayan Zohrei and S. L. Beux},
  journal = {IEEE International New Circuits and Systems Conference},
  year   = {2022},
  doi    = {10.1109/NEWCAS52662.2022.9842058}
}

Acknowledgements

This work was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC) Discovery Grants programme and by the Fonds de recherche du Québec — Nature et technologies (FRQNT).