Jean-Baptiste Waring

Biographie

Jean-Baptiste Waring is a PhD student at LECS, working on compilation, routing, and error-aware optimisation for noisy intermediate-scale quantum (NISQ) processors, with a particular focus on dynamic circuits. Recent contributions include robust GHZ state preparation via majority-voted boundary measurements (accepted for oral presentation at IEEE NEWCAS 2026), CHSH inequality violations using dynamic circuits (IEEE QCE 2025), noise-aware utility optimisation of NISQ devices (IEEE NEWCAS 2024), and XGSwap, a gradient-boosted approach to qubit routing. He holds a B.Eng. in Aerospace Engineering (with Distinction) from Concordia University and is also Lead AI Solutions Architect at Zetane Systems in Montréal, where he designs and ships production AI systems for enterprise clients.